Double Data Rate memory (DDR memory) is a type of Random Access Memory (RAM) that uses both the rising and falling edges of a clock strobe signal. As such, DDR memory transfers data twice per clock strobe cycle. DDR memory may exchange data between one of various types of central processing units (CPUs) and a north bridge via, for example, a front-side bus.
“Set-up time” and “hold time” together describe the timing requirements on the data input of a sequential logic element, such as a flip-flop or register, with respect to a clock input. The set-up and hold times define a temporal window during which data must be stable to guarantee predictable performance over a full range of operating conditions and manufacturing tolerances. The set-up time is the length of time that data must be available and stable on the input terminal of a storage element before arrival of a clock edge for the data to be captured by the storage element; the hold time is the length of time that the data must remain stable after the arrival of the clock edge.